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Tensilica Delivers New Design Flow Support for Synopsys’ Galaxy Implementation Platform Technologies

New Flow Delivers 15 Percent Better Performance and Power

SANTA CLARA, Calif. - December 8, 2009 -Tensilica, Inc. today announced that it now provides out-of-the-box automated design flow support for key technologies within Synopsys' Galaxy Implementation Platform, including DC Ultra RTL synthesis and IC Compiler place-and-route, for Tensilica's new Xtensa 8 and Xtensa LX3 dataplane processors (DPUs). This latest design flow provides up to 15% improvement in processor speed, area and power, in addition to faster design closure over previous Synopsys-based design flows, thus offering immediate benefits to Tensilica customers.

Tensilica delivers scripting support to help customers exploit advanced technologies provided by Synopsys' Galaxy platform, including Topographical technology, congestion driven placement, pin placement optimization, useful skew, and Zroute, which collectively provide high frequency with area-efficient layout.

"Tensilica's DPU IP cores are increasingly used in a variety of power-and-performance critical dataplane and signal processing applications," stated Steve Smith, senior director, platform marketing at Synopsys. "Galaxy's advanced synthesis, optimization and place-and-route technologies deliver a more efficient implementation for Tensilica-based designs."

"Synopsys has delivered on what it promised with DC Ultra and IC Compiler," stated  Ashish Dixit, Tensilica's vice president of hardware engineering. "We have seen consistently better quality of results with these tools and anticipate that our customers will take full advantage of the support we provide."

About Tensilica

Tensilica, Inc. - the leader in customizable dataplane processors - is a semiconductor IP licensor recognized by the Gartner Group as the fastest growing semiconductor IP supplier in 2008. Dataplane Processor Units (DPUs) combine the best capabilities of CPUs and DSPs while delivering 10-to-100-times the performance because they can be customized using Tensilica's automated design tools to meet specific dataplane performance targets. Tensilica's DPUs power SOC designs at system OEMs and five out of the top 10 semiconductor companies for products including mobile phones, consumer electronics devices (including digital TV, Blu-ray Disc players, broadband set top boxes and portable media players), computers, and storage, networking and communications equipment. For more information on Tensilica's patented, benchmark-proven DPUs visit www.tensilica.com.

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Editors' Notes:

  • Tensilica and Xtensa are registered trademarks belonging to Tensilica Inc. All other company and product names mentioned are trademarks and/or registered trademarks of their respective owners.
  • Tensilica's announced licensees include: ADDMM, Afa Technologies, ALPS, Aquantia, Astute Networks, Atheros, AMD (ATI), Avision, Bay Microsystems, Brocade, Broadcom, Cisco Systems, CMC Microsystems, Conexant Systems, Design Art Networks, DS2, EE Solutions, Epson, ETRI, FUJIFILM Microdevices, Fujitsu Ltd., Fujitsu Microelectronics Ltd., Hudson Soft, iBiquity Digital, Ikanos Communications, IDT, Intel, Juniper Networks, LG Electronics, Lucid Information Technology, Marvell, NEC Laboratories America, NEC Corporation, Neterion, Nethra Imaging, Nippon Telephone and Telegraph (NTT), NuFront, NVIDIA, Olympus Optical Co. Ltd., Panasonic Mobile, Penstar, Plato Networks, PnpNetwork Technologies, PowerLayer Microsystems, Samsung, SiBEAM, Sony, STMicroelectronics, Stretch, TranSwitch Corporation, Triductor Technology, UpZide, Valens Semiconductor, Validity Sensors, Victor Company of Japan (JVC), WiLinx, and XM Radio.