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AMBA VIP Resources

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Unleash Your Potential To Achieve A Bug-Free Design

Cadence VIP for AMBA Protocols helps you unleash your potential by offloading the tedious and error-prone aspects of functional verification. Proven on over 2000 projects, these VIP are trusted by engineers around the world. The solution includes Simulation VIP, Accelerated VIP, and Assertion-Based VIP to support logic simulation, hardware acceleration, and formal analysis. With Cadence VIP for AMBA Protocols, you’ll have the power to get your job done right the first time.

Working in close cooperation with ARM for more than ten years, Cadence has evolved a powerful verification solution for the full range of AMBA protocols and interconnects, as these customers confirm:

HiSilicon is a leader in ASICs and solutions for communication networks and digital media. Delivering advanced multi-core ARM® SoCs to our customers requires leading IC design technologies. Cadence VIP for AXI4 and ACE™ enables us to quickly and efficiently deliver bug-free SoC designs.
– Ting Lei, Director of Cloud Computing, HiSilicon

“As the complexity of ARM partners’ designs increases year after year, successfully verifying the performance of the SoCs has become a critical imperative. The comprehensive Cadence Verification IP solution for AMBA® protocols has enabled our mutual customers to address this challenge while incorporating the latest ARM technology. The ARM partnership with Cadence helps customers achieve continued success as they roll out next-generation designs incorporating our most advanced AMBA specifications such as AXI4 and AXI Coherency Extensions (ACE™).” 
– Joe Convey, Director of Design Enablement, ARM

"By using Cadence tools, we have only needed to focus on whether it meets the design’s intention, which has increased our efficiency significantly. Cadence VIP and Interconnect Validator demonstrated the ability to address all our interconnect verification concerns; VIP ensures the correctness and Interconnect Validator helps us to achieve the completeness and compliance." 
-Hao Wen and Jianhong Chen, Spreadtrum

A Three Pronged Approach For Best Results

To enable complete SoC fabric verification, three components are needed:

  • Protocol compliance verification
  • Data integrity analysis
  • Performance verification

Protocol compliance checking is performed by the Simulation VIP, Accelerated VIP, and Assertion-Based VIP. Data integrity is verified with the Interconnect Validator, a unique VIP component that monitors all the transactions that flow across an interconnect to verify conformance to data transformation and cache coherency rules.  Performance verification entails measuring bandwidth and latency results for simulated traffic.  All three are part of the Cadence interconnect verification solution.


Exploring the ARM CoreLinkTM CCI-500 performance envelope - Part 1

Exploring the ARM CoreLink™ CCI-500 performance envelope – Part 2

Increased CHI Coherency Verification Challenges

IP Requirements for Verifying CHI-Based Designs

Interconnect Validator and its Significance

Multicore ARM SoCs Face Cache Coherency Dilemma


Functional and performance verification of SoC interconnects

5 Keys for Optimizing SoC Latency and Bandwidth

Experts At The Table: Performance Analysis

Designer View: SoC Interconnect Analysis – What We’re Doing, What’s Still Needed

Interconnect Workbench Eases Analysis and Verification for ARM-Based SoCs