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SRIO Simulation Verification IP (VIP)

Specification Support

The SRIO VIP supports SRIO Protocol versions 1.3, 2.0 and 2.1 as defined in the SRIO Protocol Specification. 

The specification is available at:  http://www.rapidio.org/specs/current/rev2.1_spec_stack.zip

Exception: The SRIO VIP doesn't support Switch Device features

Key Features

Feature Name

IO Logical

Input/Output packet formats are supported

Message Passing

Message passing architecture and packet formats are supported

Globally shared Memory

Globally shared distributed memory model architecture and packet formats are supported

Flow Control

Flow Control Logical Layer management based on source, destination and physical channel is supported

Data Streaming

Data Streaming Logical specification is supported


1x, 2x, 4x, 8x and 16x Lanes are supported


Both IDLE1 and IDLE2 sequences and therefore Short and Long Control Symbols are supported

VC support

Multiple virtual channels on PHY are supported


Both reliable and continuous traffic (RT and CT) are supported

Phy Flow Control

Both receiver-ended and transmitter-controlled flow control on Physical Layer are supported

EndPoint Device

EndPoint Device features are supported

Transport Large Device

Both small and large device IDs are supported

Supported Design-Under-Test Configurations

Host Device Hub/Switch
Full Stack Controller Only PHY Only

Test Suite Options

Basic CMS PureSuite TripleCheck


Test Suite Comparison

Constrained-random example tests
Directed compliance tests
Constrained-random compliance tests
Tests targeting all protocol layers
3rd party simulator test execution
SystemVerilog functional coverage model
efunctional coverage model
Verification plan mapped to protocol specification
Verification plan integration with Cadence vManager metric-driven analysis system
Verification plan integration with 3rd party simulator environments