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PCI Simulation Verification IP (VIP)

Specification Support

The PCI VIP supports the PCI Protocol versions 1.0, 2.0, 2.1, 2.2 and 2.3, as defined in the PCI Protocol Specification. 

The specification is available at: www.cisl.columbia.edu/courses/spring-2004/ee4340/restricted_handouts/pci_23.pdf

Key Features

Feature Name

Bus data width

Supports both 32- and 64-bit bus data widths 

Arbitration Supports master arbitration 
Multiple agents Supports multi-mastering and configurable number of target agents
Interrupt pins Configurable number of optional interrupt pins is supported
Power management Supports power management registers 
Lock Supports lock feature 
Multi-function device Configurable number of functions is supported per device
Burst types Both linear and cache line wrap modes for both read and write
64-bit addressing Optional 64-bit addressing is supported
Transaction termination All transaction termination types are supported: Completion, Master-Abort, Timeout, Retry, Disconnect with/without data, and Target-Abort

Supported Design-Under-Test Configurations

Master Slave Hub/Switch
Full Stack Controller Only PHY Only

Test Suite Options

Basic CMS PureSuite TripleCheck


Test Suite Comparison

Constrained-random example tests
Directed compliance tests
Constrained-random compliance tests
Tests targeting all protocol layers
3rd party simulator test execution
SystemVerilog functional coverage model
efunctional coverage model
Verification plan mapped to protocol specification
Verification plan integration with Cadence vManager metric-driven analysis system
Verification plan integration with 3rd party simulator environments