Home: IP Portfolio > Verification IP > Simulation VIP > Bluetooth 5 Simulation VIP

Bluetooth 5 Simulation Verification IP (VIP)

Specification Support

The Bluetooth 5 VIP supports Bluetooth specification versions 4.2 and 5.0 available at http://www.bluetooth.com

Product Highlights

  • Comprehensive Bluetoooth 5 coverage with support for full specification

  • Simplified verification with a single model for Bluetooth Low Energy (BLE) as well as Basic Rate/Enhanced Data Rate (BR/EDR)

Key Features

Feature Name

Description

Advertiser

High Duty-Low Duty, Directed-Undirected, Connectable-NonConnectable Advertisement

Scanner/Initiator

Active-Passive Scanning

Master/Slave

Support for all Control Procedures e.g. Connection Update, PHY Update

LE Encryption

Counter with Cipher Block Chaining-Message Authentication Code (CCM) Mode

LL Privacy

Generation of Resolvable Private Address

Host Controller Interface

LE HCI commands/events/data fully supported

HCI transport Layer

UART/USB/User-Defined protocol as a HCI transport layer

Mbps LE

2 Ms/s packets transmission and reception capability

LE Long Range

Configurable Coded PHY for FEC2 Block with S=2/S=8

LE Advertising Extensions

Advertisement/Connection on Primary/Secondary Channels using EXT/AUX PDUs, Periodic Advertisement

LE Channel Selection Algorithm#2

Counter based Channel Selection Algorithm for Secondary Channels

 

Key Verification Capabilities

General
  • Full compliance with Bluetooth Test Specification provided by the Bluetooth Special Interest Group (SIG) covering Host Controller Interface, Link Layer, etc.
  • Mimics multiple devices (each configured to a different profile) simultaneously that can dynamically connect/disconnect to create scatternet topology
  • Supports simultaneous multiple Link Layer state machines
  • Flexible, programmatic configurability using Soma/uvm_config_db
  • Simple register read-write interface to configure the VIP parameters dynamically
  • Monitors, checks, and collect coverage on bus traffic from HCI and Controller
  • Host Layer control to generate specific command/event sequences and/or message sequence procedures for link layer using HCI
PHY
  • Full functional PHY (1M/2M/Coded) verification
  • GFSK Modulation-Demodulation
  • Direct Test Mode MSCs (HCI/UART-2wire
PHY Adaptor
  • Connects Txd with appropriate Rxd based on ChannelIndex
  • Phy Adaptor supports multiple device connections to create scatternet network
  • Mimics collision scenarios
Controller
  •  Error injection

Supported Design-Under-Test Configurations

Controller Device
Full Stack Controller Only PHY Only

 

Test Suite Options

Basic CMS PureSuite TripleCheck


Test Suite Comparison

 BasicCMSPureSuiteTripleCheck
Constrained-random example tests
Directed compliance tests
Constrained-random compliance tests
Tests targeting all protocol layers
3rd party simulator test execution
SystemVerilog functional coverage model
efunctional coverage model
Verification plan mapped to protocol specification
Verification plan integration with Cadence vManager metric-driven analysis system
Verification plan integration with 3rd party simulator environments