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HDMI 2.0 Simulation Verification IP (VIP)

Specification Support

HDMI 2.0 VIP supports features from HDMI Protocol version 2.0 R 16.

The HDMI specification is developed by the HDMI Forum http://www.hdmi.org/ . The HDMI 2.0 Specification is incremental to HDMI protocol v1.4. The HDMI 2.0 Specification is still under draft version and is available only for licensed users.

Product Highlights

  • Industry's first HDMI 2.0 VIP

Key Features

Feature Name

3D - Guarantee interoperability for 25Hz formats

Supports 3D video formats for 25Hz frames

3D - Indication of independent view

Supports configuration of 3D Video extension registers in HDMI LLC Vendor Specific InfoFrame Packet

3D - Support Dual-view

Supports configuration of 3D Video extension registers in HDMI LLC Vendor Specific InfoFrame Packet

3D - Support OSD Disparity Indication

Supports configuration of 3D Video extension registers in HDMI LLC Vendor Specific InfoFrame Packet

3D – Capability

Supports various 3D video frame formats

4K x 2K Resolution

Supports 4Kx2K video frame formats


Supports all 21:9 video formats defined by CEA-861-F specifications

Audio extensions Supports 3D Audio and Multi-stream Audio
Character Error Detection (CED) Supports the mechanism for detecting and reporting character errors

Consumer Electronics Control (CEC v1.3)

Supports 6 different types of CEC v1.3 device configurations.

Custom Frame Formats

Supports Custom Frame formats that allows user to configure frame formats that are DUT specific and not defined in the specification

Deep Color Modes Supports B24, B30, B36, B48 deep color modes.

Direct Data Channel (DDC)

Supports DDC channel which is used by an HDMI source to determine the capabilities and characteristics of the sink by reading the E-EDID data structure.

Expanded Color Spaces

Supports different types of extended color space exclusively defined within the HDMI specification

HDMI Packets

Supports all packet types defined in the HDMI Specification 2.0


HDMI VIP supports both HDMI and DVI mode of operation. In HDMI mode of operation, the HDMI frame consists of video data, control data, and packets; while in DVI mode, HDMI frame consists of video data and control period only

HDMI CTS 2.0 Compliance  Supports HDMI CTS 2.0 compliance checks

High-bandwidth Digital Content Protection 1.4 (HDCP 1.4)

Supports different types of HDCP encryption mode, supports Key Selection Vectors for transmitter and receiver. Supports transmission and reception of HDCP private keys. Supports Authentication bypass.

High-bandwidth Digital Content Protection 2.2 (HDCP 2.2) Supports Authentication and Key Exchange (with and without pairing). Supports locality check. Supports Session Key Exchange. Supports Transmitter/Receiver State Machines. Supports Link Integrity Check. Supports Encryption (Cipher and Encryption Status Signaling)

Pixel Encoding 

Supports RGB, YCbCr 4:4:4 and YCbCr 4:2:2 pixel encodings.

Scrambling for EMI/RFI reduction Supports 340 Mcsc to 600 Mcsc TMDS Character Rate

Serial and Symbol interfaces

Supports Serial and Symbol interface types

Source and Sink

Supports verification of both Source (Tx) and Sink (Rx) device types

Status and Control Data Channel (SCDC) Supports SCDC registers. Supports Read Request by slave
YCbCr 4:2:0 Pixel Encoding Supports 4:2:0 based pixel encoding and frame packing/unpacking

Supported Design-Under-Test Configurations

Source Sink Hub/Switch
Full Stack Controller Only PHY Only

Test Suite Options

Basic CMS PureSuite TripleCheck

Test Suite Comparison

Constrained-random example tests
Directed compliance tests
Constrained-random compliance tests
Tests targeting all protocol layers
3rd party simulator test execution
SystemVerilog functional coverage model
efunctional coverage model
Verification plan mapped to protocol specification
Verification plan integration with Cadence vManager metric-driven analysis system
Verification plan integration with 3rd party simulator environments

User Feedback

"The HDMI 2.0 verification IP provided by Cadence enabled a small verification team to deliver reliable results within very tight schedule constraints. By reducing the effort required to develop a verification solution, our engineers were able to focus on other tasks crucial to project completion. As a result, we were able to create the type of high-quality and reliable design expected by our customers."

- Larry Porter, Verification Manager, Display Products Division, STMicroelectronics