Home: IP Portfolio > Verification IP > Simulation VIP > AMBA 4 Stream Simulation VIP

AMBA 4 Stream Simulation Verification IP (VIP)

Specification Support

The AXI4-Stream VIP supports the AMBA® AXI4-Stream Protocol v1.0 and the AXI4-Stream as defined in the AMBA AXI4-Stream Protocol Specification.
The specifications for the AMBA protocol are available at AMBA Specifications

Key Features

Feature Name
All data and address widths Customizable address width up to 32 bits and data width up to 20,000 bits. Data width can be multiples of 8. Customizable user width up to the customized data width.
Controlling order in the interface Order in the interface is fully controllable by the user.
Delay control Sets the delay between the items on the interface.
Master packet signal control Determines the values of the signals in the interface.
Master transfer signal control Determines the values of the signals in the write data channel.
Multiple agent support Can support any number of agents.

Supported Design-Under-Test Configurations

Master Slave Hub/Switch
Full stack Controller-only PHY-only

Test Suite Options

Basic CMS PureSuite TripleCheck

Test Suite Comparison

Constrained-random example tests
Directed compliance tests
Constrained-random compliance tests
Tests targeting all protocol layers
3rd party simulator test execution
SystemVerilog functional coverage model
efunctional coverage model
Verification plan mapped to protocol specification
Verification plan integration with Cadence vManager metric-driven analysis system
Verification plan integration with 3rd party simulator environments

User Feedback

“As the complexity of ARM partners’ designs increases year after year, successfully verifying the performance of the SoCs has become a critical imperative. The comprehensive Cadence verification IP solution for AMBA protocols has enabled our mutual customers to address this challenge while incorporating the latest ARM technology. ARM’s partnership with Cadence helps customers achieve continued success as they roll out next-generation designs incorporating our most advanced AMBA specifications such as AXI4 and AXI Coherency Extensions (ACE).” 
–Joe Convey, Director of Design Enablement, ARM