Home: IP Portfolio > Verification IP > Productivity Tools > TripleCheck IP Validator for USB 3.2

TripleCheck IP Validator for USB 3.2

The Cadence USB 3.2 TripleCheck adds another layer of verification capabilities above the VIP for USB 3.2. The USB 3.2 TripleCheck lays its foundations upon three main components:

  • The coverage model of the basic VIP
  • A comprehensive pre-packaged testsuite
  • Verification plans (vPlans) constructed to match the specification format

Description

Track the progress

The Cadence USB 3.2 TripleCheck provides an easier way to ramp up quickly on your verification tasks. The vPlan helps to focus on a specific feature or those in the specification. And, when we combine that with the ability of the testsuite to reach nearly every vPlan item, we verify the design effectively, easily, and methodically. In addition, using TripleCheck helps the team to assess the project's progress by simply tracking the overall coverage grade week by week.

See only what you need

The vPlans were built in accordance to the specification structure and formations, using the same sections, headlines and quotations from the specification so that it is easier to check corresponding sections and annotations.The vPlans consist of "perspectives"-- which hold a set of parameters that roughly describe the DUT. A user is able to edit the perspective to match the DUT capabilities, this allowing the vPlan to automatically filter portions of the specification that are irrelevant for a particular design.

Reuse the existing test coverage

In case that there is a significant chunk of legacy tests, verification engineers can leverage the coverage from this library of tests as well. The vPlan allows users to incorporate the Triplecheck provided vPlan with the user's own vPlans. Moreover, the cumulative coverage from these tests as well as Triplecheck testsuite can be plotted on the same vPlan to enhance the reach of the solution according to customer needs.

Testsuite

At present, the TripleCheck solution contains over 200 self-checking tests in the testsuite based on Compliance Specification for USB 3.2.

  • These tests are mapped to vPlan sections through relevant coverage items. 
  • Robust testsuite able to run on major simulators
  • Most of the testcases are directed with consistency in results across simulators and seeds.
  • Testcase description present in the test list as well as documented with step by step guidance for understanding the purpose and behavior of the tests

Specification

USB 3.2 TripleCheck supports the USB 3.2 specification release. You can download the specification from the website http://www.usb.org.

Product Features

Key features from the specification that are implemented in the VIP are listed in the table below.  

Feature Name
Vplan
Coverage
Test Suite

Physical layer

LTSSM

Low Power

Link Layer Host/Device Mode

Host/Device Mode

 

Key Verification Capabilities

USB 3.2 TripleCheck:

  • Runs on IES and VCS
  • Supports SystemVerilog UVM.
  • Vplan includes mapping of USB 3.2 Revision 1 specification
  • Maps each vPlan item to a specific test designed to stimulate that feature.
  • Is easily extended to reuse existing vPlans.
  • Can initiate stimulus from the DUT using the Port Driver.

  • Comprehensive testsuite with 400+ self-checking tests.

Limitations

  • DUT as Hub is not supported
  • Framework and Protocol layers are not supported
  • Retimer not supported

Training, Documentation, and Usage Information

See the Verification IP Support Home on Cadence Online Support for training, documentation, and usage information.

Related Products


Related Products