Wide I/O

Specification Support

The Wide I/O SDRAM Memory Model VIP supports single-channel implementation of the officially released JESD229 version of the Wide I/O SDR specification, and can be used 4 times to model the 4-channel device. The specification is available here: http://www.jedec.org/sites/default/files/docs/JESD229.pdf

Key Features

Feature Name
State machine and timing checks Implements internal Wide I/O state machine and performs specified timing checks.

Data width

128-bit wide data bus. Single data rate.

Device density support The model supports a wide range of device densities.
Differential CK/DQS Allowed for future DDR extension.


  • Partial-array self refresh 
  • Per-bank refresh
Allows portions of the array to be powered down when not required, permitting applications to determine device memory requirements on a real-time usage basis.