NVDIMM-P

This Cadence® Verification IP (VIP) supports the JEDEC DDR4 NVDIMM-P memory device standard. It provides a mature, highly capable compliance verification solution that supports simulation, formal analysis, and hardware acceleration platforms, making it applicable to intellectual property (IP), system-on-chip (SoC), and system-level verification. The DDR4 NVDIMM-P VIP is compatible with the industry-standard Universal Verification Methodology (UVM), runs on all leading simulators, and leverages the industry-standard Cadence Memory Model core architecture, interface, and use model.

DDR4 NVDIMM-P is the next-generation DIMM specification that supports high-capacity memory and block storage and extended memory address space.

Specification Support

Release
Standard
11.30.057
JEDEC DDR4 NDIMM-P Specification (Rev 0.85)
11.30.051
Ballots under JEDEC consideration

Product Highlights

  • Backdoor access for Media controller, Mode Registers, and Model state

  • Dynamically change timing parameters

  • Transaction callbacks for the Media controller and DDR4 DB

  • Comprehensive assertion library: Includes a large number of assertions for assertion coverage

  • Supports on-chip ECC, XREAD and XWRITE, SREAD, SEND, SEND-W_PER, PWRITE, MRS, FLUSH, Power Down Entry and Exit, and ZQ Calibration Commands

  • Supports command parity, Mode Registers MR0 to MR6

  • Extended register mapping and access including Write to DDR4 DB BCW

  • Power On initialization

Key Features

The following table describes key features from the specification that are implemented in the VIP.

Feature Name
Description
Data Poison
Supports poison bit to indicate data corruption
DDR4 DB Integration
Reads and Writes will be propagated using the DDR4 DB device with Media controller connected to the DRAM side of DDR4 DB data pins
DRAM-Compatible Pin Interface         
Works with the same set of pins as DDR4 UDIMM, RDIMM, and LRDIMM
Extended Memory Address Space
Supports up to 8TB memory
Handshaking Scheme
Supports Read and Write functionality with handshaking scheme between the Host controller and the Media controller
Out-of-Order Operation
DDR4 NVDIMM-P supports out-of-order memory Reads and Writes