Optimize with TIE

Get Outstanding Performance by Adding TIE Instructions

You've read about how much you can accelerate performance and lower power by customizing a Cadence® Tensilica® processor core. How exactly do you do that?

You customize an Tensilica Xtensa® processor using a simple 2-step process that takes place within Xplorer, our easy-to-use Eclipse-based Integrated Design Environment (IDE).

Step 1: Get Just the Options You Need

Configure the processor by simply clicking on the options you want in your core.

Sample Configuration Screen Shot

Sample Configuration Screen Shot

Step 2: Add Custom Instructions

Add your own custom instructions. It's easier and faster to add new instructions to an Xtensa processor than to design a Verilog hardware block to perform that function. You can express the desired functionality in the. TIE is a Verilog-like language used to describe desired custom instructions. You can also specify that a complex instruction be implemented as a multi-cycle instruction with a single TIE language directive. TIE helps you get orders of magnitude performance increases out of your processor design. See our example below.

A designer creates a TIE file defining new functions and data types using the TIE development and analysis tools in Xtensa Xplorer. The TIE file can be used with the TIE compiler to create updated software tools and instruction set simulator within minutes, on the desktop. Try this with other configurable processors, and you’ll have to integrate new instructions manually over a span of several weeks.

With Complete Ecosystem and Tool Set

Adding TIE instructions to a Tensilica processor core never compromises the underlying base Xtensa instruction set, thereby ensuring availability of a robust ecosystem of third-party application software and development tools. All configurable, extensible Xtensa processors are always compatible with major operating systems, debug probes, and ICE solutions. In addition, they always come with an automatically generated, complete software development toolchain including an advanced integrated development environment based on the ECLIPSE framework, a world-class compiler, a cycle-accurate SystemC-compatible instruction set simulator, and the full industry-standard GNU toolchain.

TIE Example

Consider the following C function POPC, which checks to see how many bits are set in a 32-bit word:

How many bits are set?

Very simple TIE instructions make this operation much more efficient.

For more information, see our white paper: .