System Bus Peripherals for SoC Designs | Cadence IP

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System Bus Peripherals

Cadence System Bus Peripherals provide essential timing and serial connectivity interfaces for your design, a must have for every System on Chip (SoC).

Compatible with the 32-bit ARM® AMBA® APB interface, Cadence System Bus Peripherals can be easily managed by the majority of processors available in the market. Also, with the help of the AHB2APB bridge IP, the subsystem of AMBA components can be connected to the AHB bus.

Cadence System Bus Peripherals include the following IP components:

  • Serial Interfaces – GPIO, I2C, SPI, UART
  • Timers – PWM, RTC, TTC, WDT

Products

General Purpose I/O (GPIO)Provides up to 32 programmable I/O ports, each of which can be independently programmed

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Inter Integrated Circuit (I2C)A bus controller that can function as a master or slave in a multi-master, two-wire serial I2C bus

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Serial Peripheral Interface (SPI)Provides full-duplex, synchronous, serial communication between master and slave

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Pulse Width Modulator (PWM)Can be targeted to virtually any technology

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Real Time Clock (RTC)Accurate time-of-day keeper plus calendar functionality

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Triple Timer Counter (TTC)Three independent timers/counters

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Watchdog Timer (WDT)Prevents system lockup

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Universal Asynchronous Receiver Transmitter (UART) Full duplex asynchronous receiver and transmitter

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