Cadence® Controller IP for M-PCIe™ addresses a broad range of mobile applications, tapping into this latest addition to the PCIe® family. Target applications include application processors, wireless devices, and other components in the mobile ecosystem.
Our M-PCIe controller IP, supporting the latest PCI-SIG® specifications, provides unsurpassed flexibility with the ability to configure and customize a controller to your specific needs. The controller designs are highly configurable from High-Speed Gear1 x1 to High-Speed Gear3 x8, and are available in root port, endpoint, and dual mode configurations. The controller area is optimized for each application to provide you with the best power and performance.
Cadence M-PCIe controllers offer over 100 configurable features and 1,500 input parameters to optimize your design for the best area and performance for a specific application.
Cadence Controller IP for M-PCIe is delivered as clear, readable, synthesizable RTL with STA scripts, comprehensive user guides, and documentation.
The M-PCIe product family also includes software drivers with reference integration code for Linux. You can accelerate software development on Cadence IP using our family of Virtual Reference Platforms.
Cadence has been a market leader in PCI controllers, with a significant number of designs in silicon that have been tested for interoperability and compatibility with a wide range of motherboards. Customers using our high-end designs have demonstrated performance that approaches the theoretical limits of throughput.
Cadence is a sponsor of the M-PCIe ECN as an active member of the PCI-SIG®, and we have presented at a number of DevCon events.
|Root Ports||Gear1/Gear2/Gear3 support with x1-x8 lane combinations|
|Endpoint||Gear1/Gear2/Gear3 support with x1-x8 lane combinations|
|Dual Mode||Gear1/Gear2/Gear3 support with x1-x8 lane combinations and ability to strap the controller into root port or endpoint mode|