SoC Design IP and Verification IP Solutions | Cadence IP

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Go with an open IP platform and the freedom to customize your app driven SoC design

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Expert Corner

Whiteboard Wednesdays

Whiteboard Wednesdays—Mapping Convolutional Neural Networks to the Vision P5 DSP
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Blogs

DesignCon Demonstration of IP for PCIe 4.0 and 16Gbps Multi-Protocol PHY

We enjoyed sharing our latest news with the many people who visited our booth at...

New 16Gbps Multi-link, Multi-protocol SerDes PHY Enhances Datacenter Connectivity

PCIe Gen4 is bringing new possibilities to servers and virtualization. The interface increases the bandwidth...